This invention relates to a method of manufacturing a semiconductor device having closely spaced electrodes. As an example and a preferred embodiment of a semiconductor device having closely spaced electrodes, a Shottky barrier gate field effect transistor will in general be referred to below.
A Shottky barrier gate field effect transistor comprises source and a electrodes formed on a surface of a semiconductor crystal and a gate electrode formed on the surface between the source and drain electrodes. In order to achieve the desired electrical characteristics, a Shottky barrier gate field effect transistor should have, in the first instance the shortest possible gate length. Secondly, the gate electrode should be of a sufficiently low resistance. Thirdly, the parasitic resistances and capacities between the source and gate electrodes and between the gate and drain electrodes should be as small as possible. For example, it is known that the highest frequency an n-type gallium arsenide Shottky barrier gate field effect transistor having a gate length of 1 micron is capable of producing is 40 GHz. The maximum frequency, however, is dependent on the parasitic factors, particularly the resistance of the gate electrode and the series parasitic resistance between the source and gate electrodes, rather than the intrinsic transistor parameters. The series parasitic resistance between the electrodes, in turn, depends on the distance between the electrodes. On the other hand, it has been found to be difficult to manufacture a Shottky barrier gate field effect transistor wherein the resistance of the gate electrode is sufficiently low, the gate length is about 2 microns or shorter, and the electrodes are spaced apart by 1 micron or less. In addition, it has been found to be difficult to render the gate length short and yet the resistance of the gate electrode low. Furthermore, the necessary registration of masks has proved troublesome.